Toshiba Developed Technology That Mitigates Parasitic Oscillation in SiC Power Modules Connected in Parallel

 https://www.powersemiconductorsweekly.com/2024/07/26/toshiba-developed-technology-that-mitigates-parasitic-oscillation-in-sic-power-modules-connected-in-parallel/

This article discusses a significant technological advancement by Toshiba in the field of power electronics, specifically for Silicon Carbide (SiC) power modules. Here are the key points:

1. Problem addressed: Parasitic oscillation in SiC power modules with MOSFETs connected in parallel.

2. Solution: Toshiba developed a technology that mitigates this oscillation while using 60% smaller gate resistance than typical.

3. Benefits: 

   - Reduced power loss in power modules

   - Mitigated oscillation

   - Highly reliable switching operations

4. Context: Increasing demand for energy-efficient technologies in renewables, railways, and industrial equipment.

5. Technical approach:

   - Used an equivalent circuit model to determine conditions triggering parasitic oscillation

   - Developed a wiring layout less likely to cause oscillation

   - Focused on the ratio of gate-to-gate inductance (Lg) to source-to-source inductance (Ls)

   - Increasing Lg/Ls ratio proved effective in mitigating oscillation

6. Validation: Prototype modules with different Lg/Ls ratios were fabricated and tested, confirming the effectiveness of the approach.

7. Future plans: Toshiba will continue refining the modules for early product launch.

8. Presentation: The technology was presented at the 36th International Symposium on Power Semiconductor Devices and ICs (ISPSD) 2024 in Bremen, Germany.

This development is significant for advancing SiC power module technology, potentially leading to more efficient and reliable power electronics in various applications.